Post-quantum hardware security

Quantum-safe cryptography, built into silicon.

DATAKMON designs dedicated FPGA and ASIC hardware accelerators for the post-quantum algorithms standardized by NIST — so the data you protect today stays protected when quantum computers can break RSA and ECC.

Request an evaluation What we do

FPGA / ASIC vendor agnostic

IP licensing or source-available models, sized to the use case.

NIST PQC standards in scope: FIPS 203, 204 and 205

Architectures per algorithm: high throughput, IoT, balanced

~50

Years of combined co-founder industry experience

2024

NIST started releasing PQC standards

Team experience built at

Politehnica University of Bucharest
NXP Semiconductors
Capgemini
Qualitance
RSight

DATAKMON brings 3 major benefits:

Fast delivery

Our in-house automated development framework shortens the path from a newly standardized algorithm to a ready-to-integrate accelerator.

High flexibility

Configurable KPIs — throughput, resources and power — tuned to your use case, behind an easy-to-use interconnect interface.

Vendor agnostic

The same accelerator models target FPGA and ASIC flows from any vendor, so you are never locked in.

What we do

Hardware accelerators for NIST PQC, without locking you to a vendor.

We provide FPGA/ASIC vendor-agnostic hardware accelerator models for the PQC algorithms, under IP licensing or source-available licensing.

Deployment time: using an automated development framework (NIST test vectors – Matlab models – Vivado suite), we minimize the time between standard release and market availability.

Scalability: we offer several implementation architectures for the same algorithm, depending on the use case.

High throughput

Intensive data transfer

Moderate resources and high throughput, for intensive data transfer scenarios.

FPGA / ASICIP or source-available

Constrained devices

IoT

Reduced resources and moderate throughput, for IoT scenarios.

FPGA / ASICConfigurable KPIs

Balanced core

Classic deployments

A balanced solution between the previous two, for classic scenarios.

FPGA / ASICUse-case sized

IP licensing

Integrate a verified accelerator core into your FPGA or ASIC design under a standard IP licence, with the architecture sized to your use case.

Source-available licensing

Get access to the design source for review, certification or deep customization — full transparency for security-critical products.

How we do it

Our hardware approach

While software implementations bring lower cost and flexibility, hardware implementations bring energy efficiency and stronger security.

Step by step

Use case

We define the target together: FPGA or ASIC, required throughput, available resources and power budget.

Architecture

We choose the implementation architecture that fits — high throughput, IoT or balanced — and configure its KPIs.

Model & verify

Each algorithm is modelled in Matlab and verified against the official NIST test vectors before it reaches hardware.

Deliver

Our automated flow through the Vivado suite produces the accelerator, delivered as licensed IP or source-available, with an easy-to-use interface.

It enforces the classic advantages

Security: side-channel-resistant cores designed for AVA_VAN.5* certification, and patented solutions.

Energy: several implementation architectures, so power consumption matches the use case.

It reduces the disadvantages

Delivery time: shorter time from standardization to availability, thanks to our in-house automated development framework.

Flexibility: an easy-to-use interconnect interface makes integration straightforward.

Standards

Built on the NIST post-quantum standards.

Our accelerators implement the post-quantum algorithms standardized by NIST (National Institute of Standards and Technology), which began releasing them sequentially in August 2024.

Standard	Algorithm	Role	Status
FIPS 203	ML-KEM (Kyber)	Key encapsulation	Published, Aug 2024
FIPS 204	ML-DSA (Dilithium)	Digital signatures	Published, Aug 2024
FIPS 205	SLH-DSA (SPHINCS+)	Stateless hash-based signatures	Published, Aug 2024
FIPS 206	FN-DSA (Falcon)	Compact digital signatures	Draft
—	HQC	Backup key encapsulation	Selected, Mar 2025

Designed for AVA_VAN.5 / Common CriteriaSide-channel-resistant coresVendor agnostic FPGA / ASIC

*AVA_VAN.5 is a component of the international cybersecurity standard Common Criteria (ISO/IEC 15408) and represents the highest level of methodical vulnerability analysis (Advanced Methodical Vulnerability Analysis).

Who we are

DATAKMON was born at the intersection of elite hardware engineering, academic excellence and corporate deep-tech leadership. Founded by a powerhouse duo with nearly 50 years of combined industry experience, and backed by seasoned operations and commercial leaders, our start-up delivers an uncompromising approach to future-proof digital security: post-quantum immunity built directly into silicon.

A Foundation of Deep-Tech Mastery & Innovation

Our technical and strategic DNA bridges hands-on engineering, academic research and executive-level delivery:

Hardware Architecture & Academic Authority

Both co-founders have deep roots in academia, contributing to hardware description languages, FPGA implementation methodology, digital signal processing and advanced embedded systems — from Politehnica University of Bucharest to silicon that has to ship.

Enterprise Leadership & Proven Inventorship

Andrei led the Wireless and Machine Learning software organizations as Director of Software Engineering at NXP Semiconductors Romania and holds a Notable Inventor Certificate. Cristian moved from hands-on VHDL and C/C++ into systems architecture and executive leadership, with a dual view of delivery risk and market timing.

Mission

Protecting the digital future of the global economy.

Dr. Cristian Anghel

Co-founder & CEO

With a career spanning almost 25 years in the technology ecosystem, Cristian operates at the intersection of cutting-edge engineering and business strategy. Having evolved from hands-on hardware and software development (VHDL, C/C++) to systems architecture and executive leadership, he holds a rare dual perspective: a deep understanding of immediate delivery challenges combined with a long-term vision of market evolution.

In parallel, Cristian maintains a distinguished academic career as the lead lecturer for Hardware Description Language and Methodology for FPGA Implementation. The author of several books and of articles in prestigious international journals, his research has focused on digital signal processing for complex algorithms, including advanced radio channel decoding for modern wireless systems.

Through DATAKMON, Cristian applies this academic insight and industrial expertise to the defining security challenge of the decade: migrating data cryptography safely into the post-quantum era.

Dr. Andrei Alexandru Enescu

Co-founder & CTO

Andrei brings over 25 years of combined academic and industry leadership in electronics, hardware-software integration and advanced embedded systems. He holds both a Bachelor of Science (2003) and a Doctorate (2008) from the Faculty of Electronics, Telecommunications and Information Technology at the Politehnica University of Bucharest.

Before co-founding DATAKMON, Andrei served as Director of Software Engineering at NXP Semiconductors Romania, where he led the Wireless and Machine Learning software organizations. He holds a Notable Inventor Certificate at NXP for his contributions to cutting-edge electronic architectures. His track record in engineering management and deep-tech innovation drives DATAKMON’s focus on robust, hardware-rooted security architectures.

Ina Coman

COO & CPO

Operations and HR executive with 15+ years of experience leading business operations in the IT&C industry, with a strong track record in sustainable growth, operational excellence and organizational development.

Ina oversees Operations, Finance, HR, Legal, Procurement, Compliance and IT, translating business objectives into scalable processes and efficient operating models — building a resilient, future-ready organization.

Mădălin Șerbănescu

CSO

Mădălin is a commercial leader with over 20 years of experience in enterprise sales and a proven track record of sustained growth — +33% YoY at Qualitance, +22% at Capgemini, and 15 global enterprise contracts secured in less than two years at RSight.

He has built end-to-end go-to-market engines with full P&L ownership across banking, digital transformation and AI, built sales teams from the ground up, and maintains active C-suite relationships with the largest players in Romania and CEE.

Resources

Post-quantum, in plain words.

A short glossary of the concepts behind the quantum threat and the new standards.

Qubit: The basic unit of a quantum computer. Unlike a bit, it can hold a superposition of 0 and 1, which lets some problems be solved exponentially faster.
RSA and ECC: The public-key algorithms that protect most of today’s internet. A large enough quantum computer running Shor’s algorithm can break both.
Q-Day: The day a cryptographically relevant quantum computer exists. Nobody knows the exact date — which is why migration has to start before it.
Harvest now, decrypt later: Attackers can record encrypted traffic today and decrypt it after Q-Day. Data that must stay secret for years is already at risk.
Post-Quantum Cryptography (PQC): New algorithms that run on classical hardware but resist attacks from both classical and quantum computers.
Lattice-based cryptography: The mathematical family behind ML-KEM and ML-DSA, built on problems over high-dimensional lattices that are hard even for quantum computers.
Hybrid mode: Combining a classical and a post-quantum algorithm in the same exchange, so security holds as long as either one stays unbroken.
Side-channel attack: Extracting secret keys by measuring timing, power or electromagnetic emissions of a device. Hardware cores must be designed to resist it.

PQC readiness guide

A practical guide to preparing your products for the quantum era. Coming soon — ask us for an early copy.

Request the guide

Tell us the use case.We size the architecture.

High throughput, IoT, or a balanced core — IP licensing or source-available. Write to us and we come back with a path to an evaluation.

sales@datakmon.com
[Registered office address], Bucharest, Romania